At the Intel Foundry Direct Connect event, chief Lip-Bu Tan made a fresh pitch to nearly 1,000 attendees, promising that Intel Foundry's packaging finesse will be the thing that makes it better than the Taiwan Semiconductor Machine or Samsung.

J. Gold Associates Jack Gold backed that up: “Intel already is leading in packaging.”

He reckons half the cost of a $2,000 chip goes to packaging, making it more important than the process node. That’s bad news for those obsessed with transistor density but music to Chipzilla’s marketing team.

Intel Foundry's EVP for packaging and test Navid Shahiari said “We want to be the OSAT of choice... not just as a chipmaker but as the go-to wrapper, tester and assembler. Customers can bring any chip from any fab and still get the fancy treatment die testing, yield support, assembly and test,” he promised.

Despite the bold talk, not everyone’s buying it. Gartner analyst Gaurav Gupta said the word “leader” is slippery.

“Intel has the technology and offerings, but TSMC has much higher customer traction,” he told Fierce. Gupta acknowledged that Intel is trying to turn heads with packaging but noted the foundry is haemorrhaging money. A $2.3 billion loss in Q1 tells the story, despite a seven per cent revenue uptick.

Gupta still gave Intel some credit. “It makes sense for Intel to market itself well,” he said. But trust, he noted, remains a sticking point. Intel’s clients aren’t just looking for specs. They want delivery on time, flexibility, and some confidence their chips won’t vanish into delay hell.

Intel is dangling several tech carrots such as the EMIB-T, Foveros and a roadmap filled with 18A PowerVia in 2025, a fancier 18A-PT in 2028, and a High-NA EUV PowerDirect 14A chip in 2027. Foveros 2 even shrinks bump pitches to under 10 microns for tighter stacking and higher density.

Still, Gupta warned execution remains Chipzilla’s Achilles heel. The US and EU presence could be a nice geopolitical bonus, but it means nothing if Intel stumbles on delivery yet again.