According to Tom’s Hardware, the outfit is working on a 9.5-reticle-sized monster which will push substrate sizes to 120×150 mm—larger than a CD case—and could enable up to 40 times the performance of a standard processor.

Modern server-grade silicon is already built around multi-chiplet designs, but as AI workloads demand ever more bandwidth and compute muscle, chipmakers want to go bigger—much bigger. TSMC’s answer is a roadmap that stretches its 3DFabric platform into deep-space territory, targeting extreme high-performance computing and AI hardware.

Current CoWoS solutions max out at 2,831 mm² interposers, which already dwarfs the standard reticle area of 830 mm² and is used in silicon like AMD’s Instinct MI300X and Nvidia’s B200. These packages combine multiple logic dies and stacks of HBM3/3E, but apparently that’s no longer enough.

TSMC plans to roll out CoWoS-L with 4,719 mm² interposers and 100×100 mm substrates, supporting up to 12 HBM stacks—likely targeting Nvidia’s Rubin lineup and other heavyweight compute gear. 

Eventually the cunning plan is to build a 7,885 mm² interposer slapped onto a 120×150 mm substrate. That’s 9.5 times the reticle limit and nearly double the footprint of last year’s 8x-reticle package. Expect it to host a full buffet of compute dies (possibly N2/A16 stacked with N3), 12 HBM4 stacks, and a fleet of I/O dies.

TSMC also has an ultra-bespoke System-on-Wafer (SoW-X) option in the works. These are basically entire wafers turned into a single chip. At the moment, only Cerebras and Tesla are mad enough to use it, but TSMC expects others to arrive and it does not want to be caught short.